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Design of Analog Integrated Circuits Robust to RF Interference

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1.2 – RFI Aspects in Analog IC Design Flow 1.2 RFI Aspects in Analog IC Design Flow The susceptibility to RFI is not considered in a standard analog IC design flow. According to a standard design flow (Fig. 1.6a), in fact, an IC is first designed and simulated to achieve a target performance, then it is laid out in order to reduce the occupancy of silicon area and finally it is diffused on silicon. The aspects which are related to the susceptibility to RFI are only considered when the chip or, more often, the overall system in which it operates, fails either in EMI susceptibility compliance tests or in the field. At this point, the problem could only be addressed adding expensive external and/or on-chip shielding and filtering structures which may also adversely affect system performance. In the last years, EMI immunity aspects have been taken into account earlier in the design flow by post-layout computer simulations which may predict the suscep- tibility to EMI of a chip before it is actually integrated on silicon (Fig. 1.6b). To this purpose, RFI-oriented models of nonlinear active devices [6, 7, 8], analog circuit macromodels [9, 10, 11, 12, 13, 14, 15, 16, 17, 18] and parasitic extraction tools [19] have been proposed in the literature and implemented in the last years. These computer-aided techniques let to modify an analog IC design in the first stages in order to enhance its immunity to EMI, nonetheless, they do not provide any tool to design integrated circuits immune to EMI as they only provide information on the susceptibility of a particular design and do not give insight on the origin of the susceptibility to EMI which could be translated into design criteria to enhance the immunity of an analog IC. In order to face the problems related to the susceptibility to EMI of analog cir- cuits in an effective way, a new, EMI-susceptibility aware design flow is required (Fig. 1.6c). To this purpose, in particular, it is essential to know how the sus- ceptibility to EMI is related to design parameters and parasitics. On the basis of this information, it is possible to take into account the immunity to EMI as an IC specification which can be traded off with other system requirements in the early stage of design. An EMI-aware analog IC design requires some analysis and design tools: to this purpose, in particular, the behavior of analog integrated circuits in the presence of RF interference should be predicted by an analytical model, which relates in a simple way the susceptibility to RFI to design parameters and parasitic elements. The insight in the operation of analog IC in the presence of RFI which can be gained from such a model, in fact, can be exploited in order to derive design criteria to improve the immunity to RFI of standard analog cells and to design new high- immunity building blocks for specific analog functionalities. 7

Anteprima della Tesi di Paolo Stefano Crovetti

Anteprima della tesi: Design of Analog Integrated Circuits Robust to RF Interference, Pagina 7

Tesi di Dottorato

Dipartimento: Elettronica

Autore: Paolo Stefano Crovetti Contatta »

Composta da 158 pagine.


Questa tesi ha raggiunto 1216 click dal 10/01/2005.


Consultata integralmente 7 volte.

Disponibile in PDF, la consultazione è esclusivamente in formato digitale.