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Analysis, Modelling and Application of Advanced Power Semiconductor Devices

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9 The collector path stray inductance dictates the fault current rise slope during the collector voltage increase and the collector voltage spike at turn-off. The fast rise of the collector voltage, CE V , which is due to the high dV/dt, leads to a sudden voltage increase on the gate-emitter voltage, GE V , through the parasitic capacitance i C , which is function of the gate-emitter capacitance, GE C , and of the gate-collector capacitance, GC C . The short circuit current shows a peak due to the increase of the gate voltage, and this peak value is strictly related to both the rise time of the collector voltage and the layout parasitic inductance. The current peak peakC, I is approximately given by [9]: rise s DC peak C, t L V I ⋅= (1.1) where DC V is the dc link voltage, s L is the parasitic inductance of collector-emitter path and rise t is the rise time of the collector voltage. Finally, the voltage peaks (rising and falling edges) are strictly related to the layout parasitic inductances as well as to the current fall time as given by the following relation: fall maxC, sDCpeakCE, t I LVV ⋅+= (1.2) where the current maxC, I is the permanent short circuit current value. The experimental short circuit tests in FUL conditions have been carried out at GE V =15 V and CE V =300 V. However, as discussed in the next sections, the gate- emitter voltage attains higher values and the current temperature coefficient is observed to change sign during the FUL transient. Indeed, depending on the level reached by the collector current, a temperature increase may lead to a current increase or decrease. Also the temperature plays an important role on both the static and dynamic fault current. The static characteristics of IGBTs change as function of the temperature variation. The analysis of such variations due to the thermal behavior is also important in order to understand the features of the device in short circuit conditions. IGBTs show a singular variation of some internal quantities as function of the temperature. Consequently, with reference to the collector current C I versus the collector-emitter

Anteprima della Tesi di Rosario Pagano

Anteprima della tesi: Analysis, Modelling and Application of Advanced Power Semiconductor Devices, Pagina 14

Tesi di Dottorato

Dipartimento: Dip. Ing. Elettrica Elettronica e dei Sistemi

Autore: Rosario Pagano Contatta »

Composta da 208 pagine.

 

Questa tesi ha raggiunto 1260 click dal 13/01/2005.

 

Consultata integralmente una volta.

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